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Processor register error correction management

United States Patent

December 27, 2016
View the Complete Patent at the US Patent & Trademark Office
Processor register protection management is disclosed. In embodiments, a method of processor register protection management can include determining a sensitive logical register for executable code generated by a compiler, generating an error-correction table identifying the sensitive logical register, and storing the error-correction table in a memory accessible by a processor. The processor can be configured to generate a duplicate register of the sensitive logical register identified by the error-correction table.
Bose; Pradip (Yorktown Heights, NY), Cher; Chen-Yong (Port Chester, NY), Gupta; Meeta S. (Bangalore, IN)
International Business Machines Corporation (Armonk, NY)
14/ 510,350
October 9, 2014
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT This invention was made with Government support under B599858 awarded by the Department of Energy. The Government has certain rights to this invention.