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Multi-input and binary reproducible, high bandwidth floating point adder in a collective network

United States Patent

November 15, 2016
View the Complete Patent at the US Patent & Trademark Office
To add floating point numbers in a parallel computing system, a collective logic device receives the floating point numbers from computing nodes. The collective logic devices converts the floating point numbers to integer numbers. The collective logic device adds the integer numbers and generating a summation of the integer numbers. The collective logic device converts the summation to a floating point number. The collective logic device performs the receiving, the converting the floating point numbers, the adding, the generating and the converting the summation in one pass. One pass indicates that the computing nodes send inputs only once to the collective logic device and receive outputs only once from the collective logic device.
Chen; Dong (Yorktown Heights, NY), Eisley; Noel A. (Wappingers Falls, NY), Heidelberger; Philip (Yorktown Heights, NY), Steinmacher-Burow; Burkhard (Boeblingen, DE)
International Business Machines Corporation (Armonk, NY)
14/ 641,765
March 9, 2015
GOVERNMENT CONTRACT This invention was Government support under Contract No. B554331 awarded by Department of Energy. The Government has certain rights in this invention.