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Single-poly EEPROM cell with lightly doped MOS capacitors

United States Patent

May 27, 2008
View the Complete Patent at the US Patent & Trademark Office
An Electrically Erasable Programmable Read Only Memory (EEPROM) memory cell and a method of operation are disclosed for creating an EEPROM memory cell in a standard CMOS process. A single polysilicon layer is used in combination with lightly doped MOS capacitors. The lightly doped capacitors employed in the EEPROM memory cell can be asymmetrical in design. Asymmetrical capacitors reduce area. Further capacitance variation caused by inversion can also be reduced by using multiple control capacitors. In addition, the use of multiple tunneling capacitors provides the benefit of customized tunneling paths.
Riekels; James E. (New Hope, MN), Lucking; Thomas B. (Maple Grove, MN), Larsen; Bradley J. (Mound, MN), Gardner; Gary R. (Golden Valley, MN)
Honeywell International, Inc. (Morristown, NJ)
11/ 217,829
September 1, 2005
GOVERNMENT RIGHTS The United States Government has acquired certain rights in this invention pursuant to Contract No. DE-FC26-03NT41834 awarded by the Department of Energy.