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Clock controller for AC self-test timing analysis of logic system

United States Patent

May 18, 2004
View the Complete Patent at the US Patent & Trademark Office
Lawrence Livermore National Laboratory - Visit the Industrial Partnerships Office Website
A clock controller and clock generating method are provided for AC self-test timing analysis of a logic system. The controller includes latch circuitry which receives a DC input signal at a data input, and a pair of continuous out-of-phase clock signals at capture and launch clock inputs thereof. The latch circuitry outputs two overlapping pulses responsive to the DC input signal going high. The two overlapping pulses are provided to waveform shaper circuitry which produces therefrom two non-overlapping pulses at clock speed of the logic system to be tested. The two non-overlapping pulses are a single pair of clock pulses which facilitate AC self-test timing analysis of the logic system.
Lo; Tinchee (Fishkill, NY), Flanagan; John D. (Rhinebeck, NY)
International Business Machines Corporation (Armonk, NY)
09/ 812,321
March 20, 2001
GOVERNMENT RIGHTS NOTICE This invention was made with Government support under subcontract B338307 under prime contract W-7405-ENG-48 awarded by the Department of Energy. The Government has certain rights in the invention.