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Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

United States Patent

5,786,231
July 28, 1998
View the Complete Patent at the US Patent & Trademark Office
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A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.
Warren; William L. (Albuquerque, NM), Vanheusden; Karel J. R. (Albuquerque, NM), Schwank; James R. (Albuquerque, NM), Fleetwood; Daniel M. (Albuquerque, NM), Shaneyfelt; Marty R. (Albuquerque, NM), Winokur; Peter S. (Albuquerque, NM), Devine; Roderick A. B. (St. Martin le Vinoux, FR)
Sandia Corporation (Albuquerque, NM)
08/ 567,679
December 5, 1995
This invention was made with Government support under Contract No. DE-AC04-94AL85000 awarded by the U.S. Department of Energy. The Government has certain rights in the invention.