A differential comparator circuit for an Analog-to-Digital Converter (ADC) or other application includes a plurality of differential comparators and a plurality of offset voltage generators. Each comparator includes first and second differentially connected transistor pairs having equal and opposite voltage offsets. First and second offset control transistors are connected in series with the transistor pairs respectively. The offset voltage generators generate offset voltages corresponding to reference voltages which are compared with a differential input voltage by the comparators. Each offset voltage is applied to the offset control transistors of at least one comparator to set the overall voltage offset of the comparator to a value corresponding to the respective reference voltage. The number of offset voltage generators required in an ADC application can be reduced by a factor of approximately two by applying the offset voltage from each offset voltage generator to two comparators with opposite logical sense such that positive and negative offset voltages are produced by each offset voltage generator.
This invention was made with Government support under Small Business Innovative Research Grant No. DE-FG03-92ER81459, awarded by the Department of Energy. The Government has certain rights in this invention.