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Store operations to maintain cache coherence

United States Patent

9,720,832
August 1, 2017
View the Complete Patent at the US Patent & Trademark Office
In one embodiment, a computer-implemented method includes encountering a store operation during a compile-time of a program, where the store operation is applicable to a memory line. It is determined, by a computer processor, that no cache coherence action is necessary for the store operation. A store-without-coherence-action instruction is generated for the store operation, responsive to determining that no cache coherence action is necessary. The store-without-coherence-action instruction specifies that the store operation is to be performed without a cache coherence action, and cache coherence is maintained upon execution of the store-without-coherence-action instruction.
Evangelinos; Constantinos (Andover, MA), Nair; Ravi (Briarcliff Manor, NY), Ohmacht; Martin (Yorktown Heights, NY)
INTERNATIONAL BUSINESS MACHINES CORPORATION (Armonk, NY)
14/ 671,050
20160283377
March 27, 2015
STATEMENT OF GOVERNMENT INTEREST This invention was made with Government support under Contract No.: B599858 awarded by Department of Energy. The Government has certain rights in this invention.