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Low latency asynchronous interface circuits

United States Patent

June 20, 2017
View the Complete Patent at the US Patent & Trademark Office
Lawrence Livermore National Laboratory - Visit the Industrial Partnerships Office Website
In one form, a logic circuit includes an asynchronous logic circuit, a synchronous logic circuit, and an interface circuit coupled between the asynchronous logic circuit and the synchronous logic circuit. The asynchronous logic circuit has a plurality of asynchronous outputs for providing a corresponding plurality of asynchronous signals. The synchronous logic circuit has a plurality of synchronous inputs corresponding to the plurality of asynchronous outputs, a stretch input for receiving a stretch signal, and a clock output for providing a clock signal. The synchronous logic circuit provides the clock signal as a periodic signal but prolongs a predetermined state of the clock signal while the stretch signal is active. The asynchronous interface detects whether metastability could occur when latching any of the plurality of the asynchronous outputs of the asynchronous logic circuit using said clock signal, and activates the stretch signal while the metastability could occur.
Sadowski; Greg (Cambridge, MA)
15/ 261,438
September 9, 2016
STATEMENT REGARDING GOVERNMENT SPONSORED RESEARCH This invention was made with Government support under Prime Contract Number DE-AC52-07NA27344, Subcontract No. B600716 awarded by the Department of Energy (DOE). The Government has certain rights in this invention.