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Three-dimensional patterning methods and related devices

United States Patent

9,530,912
December 27, 2016
View the Complete Patent at the US Patent & Trademark Office
Three-dimensional patterning methods of a three-dimensional microstructure, such as a semiconductor wire array, are described, in conjunction with etching and/or deposition steps to pattern the three-dimensional microstructure.
Putnam; Morgan C. (Pasadena, CA), Kelzenberg; Michael D. (Pasadena, CA), Atwater; Harry A. (South Pasadena, CA), Boettcher; Shannon W. (Eugene, OR), Lewis; Nathan S. (La Canada, CA), Spurgeon; Joshua M. (Pasadena, CA), Turner-Evans; Daniel B. (Pasadena, CA), Warren; Emily L. (Pasadena, CA)
The California Institute of Technology (Pasadena, CA)
12/ 956,422
20110126892
November 30, 2010
STATEMENT OF GOVERNMENT GRANT This invention was made with government support under Grant Numbers DE-SC0001293 and grant DE-FG02-07ER46405 awarded by the U.S. Department of Energy and Grant Number DMR0520565 awarded by the National Science Foundation. The US government has certain rights in the invention.