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Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

United States Patent

August 23, 2016
View the Complete Patent at the US Patent & Trademark Office
National Renewable Energy Laboratory - Visit the NREL Technology Transfer Website
Techniques for Growth of Lattice-Matched Semiconductor Layers
A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.
Norman; Andrew (Evergreen, CO)
Alliance for Sustainable Energy, LLC (Golden, CA)
13/ 990,743
December 1, 2010
CONTRACTUAL ORIGIN The United States Government has rights in this invention under Contract No. DE-AC36-08GO28308 between the United States Department of Energy and the Alliance for Sustainable Energy, LLC, the Manager and Operator of the National Renewable Energy Laboratory.