An apparatus for chip-based sorting, amplification, detection, and identification of a sample having a planar substrate. The planar substrate is divided into cells. The cells are arranged on the planar substrate in rows and columns. Electrodes are located in the cells. A micro-reactor maker produces micro-reactors containing the sample. The micro-reactor maker is positioned to deliver the micro-reactors to the planar substrate. A microprocessor is connected to the electrodes for manipulating the micro-reactors on the planar substrate. A detector is positioned to interrogate the sample contained in the micro-reactors.
STATEMENT AS TO RIGHTS TO INVENTIONS MADE UNDER FEDERALLY SPONSORED RESEARCH AND DEVELOPMENT
The United States Government has rights in this invention pursuant to Contract No. DE-AC52-07NA2.7344 between the United States Department of Energy and Lawrence Livermore National Security, LLC for the operation of Lawrence Livermore National Laboratory.