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Scheduler for multiprocessor system switch with selective pairing

United States Patent

8,930,752
January 6, 2015
View the Complete Patent at the US Patent & Trademark Office
System, method and computer program product for scheduling threads in a multiprocessing system with selective pairing of processor cores for increased processing reliability. A selective pairing facility is provided that selectively connects, i.e., pairs, multiple microprocessor or processor cores to provide one highly reliable thread (or thread group). The method configures the selective pairing facility to use checking provide one highly reliable thread for high-reliability and allocate threads to corresponding processor cores indicating need for hardware checking. The method configures the selective pairing facility to provide multiple independent cores and allocate threads to corresponding processor cores indicating inherent resilience.
Gara; Alan (Mount Kisco, NY), Gschwind; Michael Karl (Chappaqua, NY), Salapura; Valentina (Mount Kisco, NY)
International Business Machines Corporation (Armonk, NY)
13/ 027,960
20120210164
February 15, 2011
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract. No. B554331 awarded by the United States Department of Energy.