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Wire like link for cycle reproducible and cycle accurate hardware accelerator

United States Patent

April 7, 2015
View the Complete Patent at the US Patent & Trademark Office
First and second field programmable gate arrays are provided which implement first and second blocks of a circuit design to be simulated. The field programmable gate arrays are operated at a first clock frequency and a wire like link is provided to send a plurality of signals between them. The wire like link includes a serializer, on the first field programmable gate array, to serialize the plurality of signals; a deserializer on the second field programmable gate array, to deserialize the plurality of signals; and a connection between the serializer and the deserializer. The serializer and the deserializer are operated at a second clock frequency, greater than the first clock frequency, and the second clock frequency is selected such that latency of transmission and reception of the plurality of signals is less than the period corresponding to the first clock frequency.
Asaad; Sameh (Briarcliff Manor, NY), Kapur; Mohit (Sleepy Hollow, NY), Parker; Benjamin D. (Peekskill, NY)
International Business Machines Corporation (Armonk, NY)
13/ 342,128
January 2, 2012
STATEMENT OF GOVERNMENT RIGHTS This invention was made with Government support under Contract No.: B554331 awarded by the Department of Energy (DOE). The Government has certain rights in this invention.