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Conditional load and store in a shared memory

United States Patent

February 3, 2015
View the Complete Patent at the US Patent & Trademark Office
A method, system and computer program product for implementing load-reserve and store-conditional instructions in a multi-processor computing system. The computing system includes a multitude of processor units and a shared memory cache, and each of the processor units has access to the memory cache. In one embodiment, the method comprises providing the memory cache with a series of reservation registers, and storing in these registers addresses reserved in the memory cache for the processor units as a result of issuing load-reserve requests. In this embodiment, when one of the processor units makes a request to store data in the memory cache using a store-conditional request, the reservation registers are checked to determine if an address in the memory cache is reserved for that processor unit. If an address in the memory cache is reserved for that processor, the data are stored at this address.
Blumrich; Matthias A. (Yorktown Heights, NY), Ohmacht; Martin (Yorktown Heights, NY)
International Business Machines Corporation (Armonk, NY)
12/ 697,799
February 1, 2010
GOVERNMENT CONTRACT This invention was Government supported under Contract No. B554331 awarded by Department of Energy. The Government has certain rights in this invention.