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Hardware packet pacing using a DMA in a parallel computer

United States Patent

August 13, 2013
View the Complete Patent at the US Patent & Trademark Office
Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.
Chen; Dong (Croton On Hudson, NY), Heidelberger; Phillip (Cortlandt Manor, NY), Vranas; Pavlos (Danville, CA)
International Business Machines Corporation (Armonk, NY)
11/ 768,682
June 26, 2007
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract. No. B554331 awarded by the Department of Energy.