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Performing a local reduction operation on a parallel computer

United States Patent

8,458,244
June 4, 2013
View the Complete Patent at the US Patent & Trademark Office
A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.
Blocksome; Michael A. (Rochester, MN), Faraj; Daniel A. (Rochester, MN)
International Business Machines Corporation (Armonk, NY)
13/ 585,993
20120317399
August 15, 2012
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT This invention was made with Government support under Contract No. B554331 awarded by the Department of Energy. The Government has certain rights in this invention.