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Programmable partitioning for high-performance coherence domains in a multiprocessor system

United States Patent

January 25, 2011
View the Complete Patent at the US Patent & Trademark Office
A multiprocessor computing system and a method of logically partitioning a multiprocessor computing system are disclosed. The multiprocessor computing system comprises a multitude of processing units, and a multitude of snoop units. Each of the processing units includes a local cache, and the snoop units are provided for supporting cache coherency in the multiprocessor system. Each of the snoop units is connected to a respective one of the processing units and to all of the other snoop units. The multiprocessor computing system further includes a partitioning system for using the snoop units to partition the multitude of processing units into a plurality of independent, memory-consistent, adjustable-size processing groups. Preferably, when the processor units are partitioned into these processing groups, the partitioning system also configures the snoop units to maintain cache coherency within each of said groups.
Blumrich; Matthias A. (Ridgefield, CT), Salapura; Valentina (Chappaqua, NY)
International Business Machines Corporation (Armonk, NY)
11/ 768,532
June 26, 2007
GOVERNMENT RIGHTS This invention was made with Government support under Contract No.: B554331, awarded by Department of Energy. The Government has certain rights to this invention.