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DMA engine for repeating communication patterns

United States Patent

September 21, 2010
View the Complete Patent at the US Patent & Trademark Office
A parallel computer system is constructed as a network of interconnected compute nodes to operate a global message-passing application for performing communications across the network. Each of the compute nodes includes one or more individual processors with memories which run local instances of the global message-passing application operating at each compute node to carry out local processing operations independent of processing operations carried out at other compute nodes. Each compute node also includes a DMA engine constructed to interact with the application via Injection FIFO Metadata describing multiple Injection FIFOs where each Injection FIFO may containing an arbitrary number of message descriptors in order to process messages with a fixed processing overhead irrespective of the number of message descriptors included in the Injection FIFO.
Chen; Dong (Croton on Hudson, NY), Gara; Alan G. (Mount Kisco, NY), Giampapa; Mark E. (Irvington, NY), Heidelberger; Philip (Cortlandt Manor, NY), Steinmacher-Burow; Burkhard (Esslingen, DE), Vranas; Pavlos (Danville, CA)
International Business Machines Corporation (Armonk, NY)
11/ 768,795
June 26, 2007
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract. No. B554331 awarded by the Department of Energy.