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Locating hardware faults in a parallel computer

United States Patent

7,697,443
April 13, 2010
View the Complete Patent at the US Patent & Trademark Office
Locating hardware faults in a parallel computer, including defining within a tree network of the parallel computer two or more sets of non-overlapping test levels of compute nodes of the network that together include all the data communications links of the network, each non-overlapping test level comprising two or more adjacent tiers of the tree; defining test cells within each non-overlapping test level, each test cell comprising a subtree of the tree including a subtree root compute node and all descendant compute nodes of the subtree root compute node within a non-overlapping test level; performing, separately on each set of non-overlapping test levels, an uplink test on all test cells in a set of non-overlapping test levels; and performing, separately from the uplink tests and separately on each set of non-overlapping test levels, a downlink test on all test cells in a set of non-overlapping test levels.
Archer; Charles J. (Rochester, MN), Megerian; Mark G. (Rochester, MN), Ratterman; Joseph D. (Rochester, MN), Smith; Brian E. (Rochester, MN)
International Business Machines Corporation (Armonk, NY)
11/ 279,592
20070242685
April 13, 2006
GOVERNMENT RIGHTS IN INVENTION The U.S. Government has a paid-up license in this invention and the right to limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract No. B519700 awarded by the Department of Energy.