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Method and apparatus for in-system redundant array repair on integrated circuits

United States Patent

July 29, 2008
View the Complete Patent at the US Patent & Trademark Office
Lawrence Livermore National Laboratory - Visit the Industrial Partnerships Office Website
Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.
Bright; Arthur A. (Croton-on-Hudson, NY), Crumley; Paul G. (Yorktown Heights, NY), Dombrowa; Marc B. (Bronx, NY), Douskey; Steven M. (Rochester, MN), Haring; Rudolf A. (Cortlandt Manor, NY), Oakland; Steven F. (Colchester, VT), Ouellette; Michael R. (Westford, VT), Strissel; Scott A. (Byron, MN)
International Business Machines Corporation (Armonk, NY)
11/ 872,085
October 15, 2007
This invention was made with Government support under Subcontract B517552 under prime contract W-7405-ENG-48 awarded by the Department of Energy. The Government has certain rights in this invention.