An array of micro-needles is created by forming an array pattern on the upper surface of a silicon wafer and etching through openings in the pattern to define micro-needle sized cavities having a desired depth. The mold thus formed may be filled with electrically conductive material, after which a desired fraction of the silicon wafer bulk is removed from the bottom-up by etching, to expose an array of projecting micro-needles. The mold may instead be filled with a flexible material to form a substrate useful in gene cell probing. An array of hollow micro-needles may be formed by coating the lower wafer surface with SiN, and etching through pattern openings in the upper surface down to the SiN layer, and then conformally coating the upper surface with thermal silicon dioxide. The SiN layer is then stripped away and a desired fraction of the bulk of the wafer removed from the bottom-up to expose an array of projecting hollow micro-needles.
GRANT PATENT RIGHTS
Portions of the underlying research were funded by the U.S. Dept. of Energy, grant DEFG0394ER40833, via the University of Hawaii. The U.S. Dept. of Energy may have rights in this patent application.