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Method of making self-aligned lightly-doped-drain structure for MOS transistors

United States Patent

October 16, 2001
View the Complete Patent at the US Patent & Trademark Office
Lawrence Livermore National Laboratory - Visit the Industrial Partnerships Office Website
A process for fabricating lightly-doped-drains (LDD) for short-channel metal oxide semiconductor (MOS) transistors. The process utilizes a pulsed laser process to incorporate the dopants, thus eliminating the prior oxide deposition and etching steps. During the process, the silicon in the source/drain region is melted by the laser energy. Impurities from the gas phase diffuse into the molten silicon to appropriately dope the source/drain regions. By controlling the energy of the laser, a lightly-doped-drain can be formed in one processing step. This is accomplished by first using a single high energy laser pulse to melt the silicon to a significant depth and thus the amount of dopants incorporated into the silicon is small. Furthermore, the dopants incorporated during this step diffuse to the edge of the MOS transistor gate structure. Next, many low energy laser pulses are used to heavily dope the source/drain silicon only in a very shallow region. Because of two-dimensional heat transfer at the MOS transistor gate edge, the low energy pulses are inset from the region initially doped by the high energy pulse. By computer control of the laser energy, the single high energy laser pulse and the subsequent low energy laser pulses are carried out in a single operational step to produce a self-aligned lightly-doped-drain-structure.
Weiner; Kurt H. (San Jose, CA), Carey; Paul G. (Mountain View, CA)
The Regents of the University of California (Oakland, CA)
08/ 593,766
January 29, 1996
The United States Government has rights in this invention pursuant to Contract No. W-7405-ENG-48 between the United States Department of Energy and the University of California for the operation of Lawrence Livermore National Laboratory.