A method for wiring allocation and switch configuration in a multiprocessor computer, the method including employing depth-first tree traversal to determine a plurality of paths among a plurality of processing elements allocated to a job along a plurality of switches and wires in a plurality of D-lines, and selecting one of the paths in accordance with at least one selection criterion.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
 This invention was made with U.S. government support under Contract No. B517552 awarded by the U.S. Department of Energy. The U.S. Government has certain rights in this invention.