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Processor Core, Processor And Method For Executing A Composite Scalar-Vector Very Lare Instruction Word (VLIW) Instruction

United States Patent Application

20170286108
A1
View the Complete Application at the US Patent & Trademark Office
A processor core includes a storage device which stores a composite very large instruction word (VLIW) instruction, an instruction unit which obtains the composite VLIW instruction from the storage device and decodes the composite VLIW instruction to determine an operation to perform, and a composite VLIW instruction execution unit which executes the decoded composite VLIW instruction to perform the operation.
Fleischer, Bruce M. (Bedford Hills, NY), FOX, Thomas Winters (Hopewell Junction, NY), JACOB, Arpith C. (Dobbs Ferry, NY), Jacobson, Hans Mikael (White Plains, NY), Nair, Ravi (Briarcliff Manor, NY), O'Brien, Kevin John Patrick (Yorktown Helghts, NY), Prener, Daniel Arthur (Croton-on-Hudson, NY)
15/ 086,947
March 31, 2016
GOVERNMENT RIGHTS [0001] This invention was made with Government support under Contract No. B599858 awarded by the Department of Energy. The Government has certain rights in this invention.