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OPTIMIZING BRANCH RE-WIRING IN A SOFTWARE INSTRUCTION CACHE

United States Patent Application

20160335087
A1
View the Complete Application at the US Patent & Trademark Office
A method includes a computer device receiving a branch instruction; the computer device managing two tables, where a first table relates to application blocks and a second table relates to available address slots; and the computer device calculating a target of the branch instruction using a branch-to-link register, the computer device optimizes re-wiring in a cache using the calculation and the managed two tables.
Bertolli, Carlo (Dobbs Ferry, NY), O'Brien, John Kevin Patrick (South Salem, NY), Eichenberger, Alexandre E. (Chappaqua, NY), Sura, Zehra Noman (Yorktown Heights, NY)
14/ 712,253
May 14, 2015
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT [0001] This invention was made with Government support under contract number B599858 awarded by Department of Energy. The Government has certain rights to this invention.