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Architecture For On-Die Interconnect

United States Patent Application

20160173413
A1
View the Complete Application at the US Patent & Trademark Office
In an embodiment, an apparatus includes: a plurality of islands configured on a semiconductor die, each of the plurality of islands having a plurality of cores; and a plurality of network switches configured on the semiconductor die and each associated with one of the plurality of islands, where each network switch includes a plurality of output ports, a first set of the output ports are each to couple to the associated network switch of an island via a point-to-point interconnect and a second set of the output ports are each to couple to the associated network switches of a plurality of islands via a point-to-multipoint interconnect. Other embodiments are described and claimed.
Khare, Surhud (Bangalore, IN), More, Ankit (Hillsboro, OR), Somasekhar, Dinesh (Portland, OR), Dunning, David S. (Portland, OR)
15/ 042,402
February 12, 2016
[0002] This invention was made with government support under B600738 awarded by Department of Energy National Nuclear Security Administration. The government has certain rights in the invention.