Full-AC load flow constitutes a core computation in power system analysis. A performance gain with a hardware implementation of a sparse-linear solver using a Field Programmable Gate Array (FPGA) is achieved by use of a DC network emulation of the power system bus. Analog Behavioral Models (ABMs)are used in an efficient strategy for designing analog emulation engines for large-scale power system computation. A generator model is also developed using analog circuits for load flow emulation for power system analysis to reduce computation time. The generator model includes reconfigurable parameters using operational transconductance amplifiers (OTAs). The circuit module is used with other reconfigurable circuits, i.e., transmission lines and loads.
STATEMENT OF GOVERNMENT INTEREST
 This invention was reduced to practice with Government support under Grant No. DE-FG02-03CH11171 awarded by The Department of Energy; the Government is therefore entitled to certain rights to this invention.